AP Seminar - 2D Materials for Next-Generation Electronics: From Low-Power Logic to Monolithic Memory

    Silicon has been the dominant material for electronic computing for decades and very likely will stay dominant for the foreseeable future. However, it is well-known that Moore’s law that propelled Silicon into this dominant position is long dead. Therefore, a fervent search for (i) new semiconductors that could directly replace silicon or (ii) new architectures with novel materials/devices added onto silicon or (iii) new physics/state-variables or a combination of above has been the subject of much of the electronic materials and devices research of the past 2 decades. The above problem is further complicated by the changing paradigm of computing from arithmetic centric to data centric in the age of billions of internet-connected devices and artificial intelligence as well as the ubiquity of computing in ever more challenging environments. Therefore, there is a pressing need for complementing and supplementing Silicon to operate with greater efficiency, speed and handle greater amounts of data. This is further necessary since a completely novel and paradigm changing computing platform (e.g. all optical computing or quantum computing) remains out of reach for now.

    The above is however not possible without fundamental innovation in new electronic materials and devices. Therefore, in this talk, I will try to make the case of how novel layered two-dimensional (2D) chalcogenide materials¹ and three-dimensional (3D) nitride materials might present interesting avenues to overcome some of the limitations being faced by Silicon hardware. I will start by presenting our ongoing and recent work on integration of 2D chalcogenide semiconductors with silicon² to realize low-power tunnelling field effect transistors. In particular I will focus on In-Se based 2D semiconductors² for this application and extend discussion on them to phase-pure, epitaxial thin-film growth over wafer scales,³ at temperatures low-enough to be compatible with back end of line (BEOL) processing in Silicon fabs.  

    I will then switch gears to discuss memory devices from 2D materials when integrated with emerging wurtzite structure ferroelectric nitride materials⁴ namely aluminium scandium nitride (AlScN). First, I will present on Ferroelectric Field Effect Transistors (FE-FETs) made from 2D materials when integrated with AlScN and make the case for 2D semiconductors in this application.^5-7 Finally, I will end with showing our most recent results on scaling 2D/AlScN FE-FETs, achieving ultra-high carrier and current densities⁸ in ferroelectrically gated MoS₂ and also demonstrate negative-capacitance FETs⁹ by engineering the AlScN/dielectric/2D interface.

References:

(1) Song, S.; Rahaman, M.; Jariwala, D. ACS Nano 2024, 18, 10955–10978.

(2) Miao, J.; ….et al. Jariwala, D. Nature Electronics 2022, 5 (11), 744-751.

(3) Song, S.;… et al. Jariwala, D. Matter 2023, 6, 3483-3498.

(4) Kim, K.-H.;…. et al. Jariwala, D. Nature Nanotechnology 2023, 18 (5), 422-441.

(5) Liu, X.;… et al. Jariwala, D. Nano Letters 2021, 21 (9), 3753-3761.

(6) Kim, K.-H.;.. et al. Jariwala, D. Nature Nanotechnology 2023, 18, 1044–1050.

(7) Kim, K.-H.; .. et al. Jariwala, D. ACS Nano 2024, 18 (5), 4180-4188.

(8) Song, S.;… et al. Jariwala, D. arXiv preprint arXiv:2406.02008 2024.

(9) Song, S.;…et al. Jariwala, D. Applied Physics Letters 2023, 123 (18).